4. Error detection/correction and fault detection/recovery
  5. Data processing system error or fault handling
  6. Reliability and availability

Timothy D. Anderson

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Automated method for testing cache

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
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Four state token passing alignment fault state circuit for micro

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
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Instruction-programmable processor with instruction loop cache

Electrical computers and digital processing systems: processing – Processing architecture – Microprocessor or multichip or multimodule processor having...
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Memory error detection reporting

Error detection/correction and fault detection/recovery – Pulse or data error handling – Error/fault detection technique
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Method and apparatus for operating one or more caches in...

Electrical computers and digital data processing systems: input/ – Input/output data processing – Direct memory accessing
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Profile ID: LFUS-PAI-P-1485690

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