Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
Inventor
active
Clock skew verification methodology for grid-based design
Fullchip functional equivalency and physical verification
Integrated circuit binning and layout design system
System and method for topology based noise estimation of...
No associations
LandOfFree
Stephan Hoerold does not yet have a rating. At this time, there are no reviews or comments for this inventor.
If you have personal experience with Stephan Hoerold, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Stephan Hoerold will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-P-2676680