4. Boots, shoes, and leggings

Sivagnanam Parthasarathy

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Apparatus and method for implementing a ROM patch using a...

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
Reexamination Certificate

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Channel constrained code aware interleaver

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Coprocessor extension architecture built using a novel...

Electrical computers and digital processing systems: processing – Processing architecture – Microprocessor or multichip or multimodule processor having...
Reexamination Certificate

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Executing cache instructions in an increased latency mode

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Power management initialization for a computer operable under a

Boots – shoes – and leggings
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Profile ID: LFUS-PAI-P-1630762

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