Channel constrained code aware interleaver

Details Channel constrained code aware interleaver Channel constrained code aware interleaver

2009-06-05

2011-11-08

Kerveros, James C (Department: 2117)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital data error correction

Reexamination Certificate

active

08055973

ABSTRACT:
An interleaver is constructed based on the joint constraints imposed in the channel and the code domains. A sequentially optimal algorithm is used for mapping bits in the inter-symbol interference (ISI) domain to the code domain by taking into account the ISI memory depth and the connectivity of the nodes within the parity check matrix. Primary design constraints are considered such as the parallelism factor so that the proposed system is hardware compliant in meeting high throughput requirements.

REFERENCES:
patent: 4394642 (1983-07-01), Currie et al.
patent: 6771615 (2004-08-01), Park et al.
patent: 7340664 (2008-03-01), Shen
patent: 7340669 (2008-03-01), Shen
patent: 7783936 (2010-08-01), Hall et al.

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