4. Error detection/correction and fault detection/recovery
  5. Pulse or data error handling
  6. Testing of error-check system

Shawn Kenneth Walker

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Cache connection with bypassing feature

Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus interface architecture
Reexamination Certificate

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Masking error detection/correction latency in multilevel...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate

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Masking error detection/correction latency in multilevel...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate

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Method and apparatus for testing error detection

Error detection/correction and fault detection/recovery – Pulse or data error handling – Testing of error-check system
Reexamination Certificate

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Unified cache port consolidation

Electrical computers and digital data processing systems: input/ – Access arbitrating – Decentralized arbitrating
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Profile ID: LFUS-PAI-P-2588495

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