4. Electrical transmission or interconnection systems
  5. Nonlinear reactor systems
  6. Parametrons

Seokjin Kim

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Architecture of an efficient at-speed programmable memory...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate

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Method and apparatus for at-speed diagnostics of embedded...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
Reexamination Certificate

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Method and apparatus for selective clocking using a Muller-C ele

Electronic digital logic circuitry – Clocking or synchronizing of logic stages or gates
Patent

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Programmable analog synapse and neural networks incorporating sa

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons
Patent

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Profile ID: LFUS-PAI-P-394430

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