4. Static information storage and retrieval
  5. Magnetic bubbles
  6. Guide structure

Sanjay K. Banerjee

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dRAM cell and method

Patent

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Floating gate transistor having buried strained silicon...

Active solid-state devices (e.g. – transistors – solid-state diode – Heterojunction device – Field effect transistor
Reexamination Certificate

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Method of making a trench DRAM cell with dynamic gain

Fishing – trapping – and vermin destroying
Patent

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Modulation doped field effect transistor having built-in drift f

Active solid-state devices (e.g. – transistors – solid-state diode – Heterojunction device – Field effect transistor
Patent

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Multiple DRAM cells in a trench

Patent

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Profile ID: LFUS-PAI-P-435144

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