dRAM cell and method

Details dRAM cell and method dRAM cell and method

1986-11-13

1987-12-15

Carroll, J.

357 234, 357 41, 357 45, 357 51, 357 55, 357 59, H01L 2978, H01L 2702, H01L 2906, H01L 2904

Patent

active

047136782

ABSTRACT:
A dRAM cell and array of cells, together with a method of fabrication, are disclosed wherein the cell includes one field effect transistor and one storage capacitor with the capacitor formed in a trench in a substrate and the transistor channel formed by epitaxial growth on the substrate. The transistor source and drain are insulated from the substrate, and the transistor may be adjacent the trench or on the upper portion of the trench sidewalls. Signal charge is stored on the capacitor plate insulated from the substrate.

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