4. Static information storage and retrieval
  5. Read/write circuit
  6. Testing

Robert Walsh

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Check bit free error correction for sleep mode data retention

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate

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Column redundancy system and method for a micro-cell...

Static information storage and retrieval – Read/write circuit – Bad bit
Reexamination Certificate

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Column redundancy system and method for a micro-cell...

Static information storage and retrieval – Read/write circuit – Bad bit
Reexamination Certificate

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Edge-triggered master + LSSD slave binary latch

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate

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Programmable built-in self test (BIST) data generator for...

Static information storage and retrieval – Read/write circuit – Testing
Reexamination Certificate

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Profile ID: LFUS-PAI-P-2464531

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