4. Boots, shoes, and leggings

Richard B. Gillett Jr.

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Apparatus and method for intelligent multiple-probe cache alloca

Electrical computers and digital processing systems: memory – Address formation – Hashing
Patent

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Backplane bus system including a plurality of nodes

Boots – shoes – and leggings
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Backplane bus with default control

Boots – shoes – and leggings
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Bus event monitor

Boots – shoes – and leggings
Patent

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High performance low pin count bus interface

Multiplex communications – Wide area network – Packet switching
Patent

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Profile ID: LFUS-PAI-P-1033186

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