4. Electrical computers and digital data processing systems: input/
  5. Intrasystem connection
  6. Bus access regulation

Raymond S. Tetrick

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Adaptive prefetch of I/O data blocks

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate

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Adaptive prefetch of I/O data blocks

Electrical computers and digital processing systems: memory – Address formation – Generating prefetch – look-ahead – jump – or predictive address
Reexamination Certificate

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High speed parallel bus and data transfer method

Boots – shoes – and leggings
Patent

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High speed synchronous/asynchronous local bus and data transfer

Boots – shoes – and leggings
Patent

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Memory array organization

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate

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Profile ID: LFUS-PAI-P-746688

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