4. Error detection/correction and fault detection/recovery
  5. Pulse or data error handling
  6. Digital logic testing

Philip George Shephard, III

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JTAG-based software to perform cumulative array repair

Data processing: measuring – calibrating – or testing – Testing system – Of circuit
Reexamination Certificate

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Method and apparatus for selectively enabling and disabling...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate

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Method and apparatus for testing a...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate

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Multifunctional latch circuit for use with both SRAM array...

Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch
Reexamination Certificate

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Programmable array built-in self test method and controller...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate

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Profile ID: LFUS-PAI-P-2603633

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