4. Pulse or digital communications
  5. Synchronizers
  6. Synchronizing the sampling time of digital data

Mu-Jen Huang

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Method for designing phase-lock loop circuits

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate

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Method of wide wire identification

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate

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Serial link scheme based on delay lock loop

Pulse or digital communications – Synchronizers – Synchronizing the sampling time of digital data
Reexamination Certificate

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Profile ID: LFUS-PAI-P-2916106

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