4. Electrical computers and digital data processing systems: input/
  5. Input/output data processing
  6. Input/output data buffering

Michael Menghui Zheng

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CDR control architecture for robust low-latency exit from...

Electrical computers and digital processing systems: support – Clock – pulse – or timing signal generation or analysis
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Data interface methods and circuitry with reduced latency

Electrical computers and digital data processing systems: input/ – Input/output data processing – Input/output data buffering
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Integrated hard-wired or partly hard-wired CRC generation...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Error/fault detection technique
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Scalable channel bundling with adaptable channel...

Multiplex communications – Communication techniques for information carried in plural... – Adaptive
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Profile ID: LFUS-PAI-P-2215755

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