Error detection/correction and fault detection/recovery – Pulse or data error handling – Error/fault detection technique
Reexamination Certificate
2006-05-17
2009-12-01
Baker, Stephen M (Department: 2112)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Error/fault detection technique
Reexamination Certificate
active
07627806
ABSTRACT:
A programmable logic integrated circuit device (“PLD”) includes high-speed serial interface (“HSSI”) circuitry that is at least partly hard-wired to perform at least some functional aspects of the HSSI operations. Cyclic redundancy check (CRC) generation and/or checking circuitry is now included in this HSSI circuitry, and again, this CRC circuitry is at least partly hard-wired to perform at least some functional aspects of its operations(s).
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Lee Chong H.
Nguyen Tam
Vijayaraghavan Divya
Xue Ning
Zheng Michael Menghui
Altera Corporation
Baker Stephen M
Ropes & Gray LLP
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