4. Electronic digital logic circuitry
  5. Interface
  6. Logic level shifting

Mark R. Santoro

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ECL to CMOS converter

Electronic digital logic circuitry – Interface – Logic level shifting
Patent

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Embedded access trees for memory arrays

Static information storage and retrieval – Addressing – Plural blocks or banks
Patent

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Method and appartus for detecting multiple address matches in a

Static information storage and retrieval – Associative memories – Ferroelectric cell
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Word line decoder/driver circuit and method

Static information storage and retrieval – Addressing – Particular decoder or driver circuit
Patent

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Word line driver circuit and method

Static information storage and retrieval – Addressing – Particular decoder or driver circuit
Patent

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Profile ID: LFUS-PAI-P-519474

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