4. Electrical transmission or interconnection systems
  5. Nonlinear reactor systems
  6. Parametrons

Laurence H. Cooke

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Accelerated scan circuitry and method for reducing scan test...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate

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Accelerated scan circuitry and method for reducing scan test...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Accelerated scan circuitry and method for reducing scan test...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Adaptable circuit blocks for use in multi-block chip design

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Adaptable circuit blocks for use in multi-block chip design

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

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