4. Pulse or digital communications
  5. Transceivers
  6. Loopback mode

Krishnan Ramamurthy

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High speed phase locked loop test method and means

Miscellaneous active electrical nonlinear devices – circuits – and – Specific signal discriminating without subsequent control – By pulse coincidence
Patent

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Loop-back test system and method

Pulse or digital communications – Transceivers – Loopback mode
Patent

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Programmable synchronization character

Pulse or digital communications – Synchronizers – Frequency or phase control using synchronizing signal
Patent

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Self test of core with unpredictable latency

Excavating
Patent

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Wrap-back test system and method

Pulse or digital communications – Transceivers – Loopback mode
Patent

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Profile ID: LFUS-PAI-P-73854

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