Kenneth B. Oliver

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Arrangements for out-of-order queue cache coherency and...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Bus patcher

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
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Bus patcher

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Data recovery method and apparatus

Pulse or digital communications – Synchronizers – Synchronizing the sampling time of digital data
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Testing a bus using bus specific instructions

Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus access regulation
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Profile ID: LFUS-PAI-P-194175

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