Data recovery method and apparatus

Pulse or digital communications – Synchronizers – Synchronizing the sampling time of digital data

Reexamination Certificate

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C375S335000, C375S354000, C375S240280

Reexamination Certificate

active

06907096

ABSTRACT:
In order to recover phase information, data transmitted at a first frequency is over-sampled using a clock at a second frequency, n times per bit time to obtain n samples. The n samples are used to detect the transitions between two logic levels in said transmitted data which are stored in groups of m sets of said n edge results which are, in turn output at a clock frequency which is the second frequency divided by m, for further processing.

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An 800 Mbps multi-channel CMOS serial link with 3× oversampling Sungjoon Kim; Kyeongho Lee; Deog-Kyoon Jeong; Lee, D.D.; Nowatzyk, A.G.; Custom Integrated Circuits Conference, Proceedings of the IEEE 1995, May 1-4 1995.
A 0.5-μm CMOS 4.0-Gbit/s Serial Link Transceiver with Data Recovery Using Oversampling/IEEE Journal of Solid-State Circuits, vol. 33, No. 5, May 1998.

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