4. Boots, shoes, and leggings

Keisuke Shinjo

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Method for wire routing of a semiconductor integrated circuit an

Boots – shoes – and leggings
Patent

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Semiconductor device, and wiring-layout design system for...

Active solid-state devices (e.g. – transistors – solid-state diode – Gate arrays – With particular power supply distribution means
Reexamination Certificate

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Testing apparatus for exactly discriminating defective product f

Excavating
Patent

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Profile ID: LFUS-PAI-P-1047562

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