Method for wire routing of a semiconductor integrated circuit an

Details Method for wire routing of a semiconductor integrated circuit an Method for wire routing of a semiconductor integrated circuit an

1992-10-23

1995-02-28

Teska, Kevin J.

Boots, shoes, and leggings

364491, 437 51, G06F 1560, H01L 2180

Patent

active

053943376

ABSTRACT:
A method and apparatus for wire routing of a semiconductor integrated circuit wherein the interconnection between the functional blocks disposed on a chip of the semiconductor integrated circuit having four or more wiring layers is implemented by computers. A plurality of adjacent wiring layers form a single set, and for at least two sets, the wire routing between terminals of the functional blocks lying on the wiring layers formed by the sets is carried out for each set independently from the other set. A plurality of computers are used, which communicate with each other through their network. A file system of one computer is shared between the two computers so that the wire routing process program, input information on the wire routing and a wire routing result can be stored within the shared file system, whereby an efficient concurrent processing is possible and the processing speed can be improved while the number of wiring layers dealt with by each wire routing process are reduced.

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Hong, Se June, et al. "Wire Routing Machines-New Tools for VLSI Physical Design" Proc. IEEE, vol. 71, pp. 57-65, Jan. 1983.

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