4. Error detection/correction and fault detection/recovery
  5. Pulse or data error handling
  6. Digital logic testing

Jochen Preiss

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3-stack floorplan for floating point unit

Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Physical design processing
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Design structure to reduce power consumption within a clock...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
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Floating point unit with fused multiply add and method for...

Electrical computers: arithmetic processing and calculating – Electrical digital calculating computer – Particular function performed
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Method to reduce power consumption within a clock gated...

Electronic digital logic circuitry – Clocking or synchronizing of logic stages or gates
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Semiconductor chip with a plurality of scannable storage...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Profile ID: LFUS-PAI-P-2326384

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