4. Electronic digital logic circuitry
  5. Interface
  6. Supply voltage level shifting

Jen-Tai Hsu

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Determining an optimal sampling clock

Pulse or digital communications – Synchronizers – Synchronizing the sampling time of digital data
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High voltage tolerant I/O buffer

Electronic digital logic circuitry – Interface – Supply voltage level shifting
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Impedance control for wide range loaded signals using...

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
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Method and apparatus for local parameter variation compensation

Electricity: measuring and testing – Impedance – admittance or other quantities representative of...
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Method and apparatus for reducing back-to-back voltage...

Electronic digital logic circuitry – Interface – Supply voltage level shifting
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Profile ID: LFUS-PAI-P-2121275

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