4. Multiplex communications
  5. Wide area network
  6. Packet switching

James J. Allen, Jr.

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Adapter for interleaving second data with first data already tra

Multiplex communications – Wide area network – Packet switching
Patent

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Data bus bandwidth scheduling in an FBDIMM memory system...

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
Reexamination Certificate

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Distributed address decoding for bus structures

Multiplex communications – Wide area network – Packet switching
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Method and apparatus for reducing latency associated with...

Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses – Using delay
Reexamination Certificate

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Structure for handling data access

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Profile ID: LFUS-PAI-P-1002852

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