4. Error detection/correction and fault detection/recovery
  5. Pulse or data error handling
  6. Digital logic testing

James Douglas Warnock

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Enhanced debug scheme for LBIST

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate

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Latching dynamic logic structure, and integrated circuit...

Electronic digital logic circuitry – Clocking or synchronizing of logic stages or gates
Reexamination Certificate

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Low skew, power efficient local clock signal generation system

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Clock or pulse waveform generating
Reexamination Certificate

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Method of power consumption reduction in clocked circuits

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate

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Method of timing model abstraction for circuits containing...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
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Profile ID: LFUS-PAI-P-2229441

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