Enhanced debug scheme for LBIST

Details Enhanced debug scheme for LBIST Enhanced debug scheme for LBIST

2005-05-31

2005-05-31

Lamarre, Greg J (Department: 2133)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital logic testing

C714S726000, C714S729000

Reexamination Certificate

active

06901546

ABSTRACT:
A device for fault testing in a microprocessor chip provides a LBIST circuit which has a first reference signature. A loading unit is further provided for receiving and outputting a set of masking data. A file unit connected to the loading unit is yet further provided for receiving the masking data. A masking unit connected to the file unit is yet further provided for generating a second reference signature based on the masking data from the file unit and a scanning data from a scan string in the chip. And, a signature logic connected to the output of the masking unit is yet further provided for compressing the second reference signature and inputting the compressed second reference signature to the LBIST circuit, wherein the compressed second reference signature replaces the first reference signature.

REFERENCES:
patent: 4779273 (1988-10-01), Beucler et al.
patent: 5574733 (1996-11-01), Kim
patent: 5991909 (1999-11-01), Rajski et al.
patent: 6021514 (2000-02-01), Koprowski
patent: 6125465 (2000-09-01), McNamara et al.
patent: 6516432 (2003-02-01), Motika et al.
patent: 2002/0073373 (2002-06-01), Nakao et al.

Affiliated with

Also associated with

Rating

Enhanced debug scheme for LBIST does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Enhanced debug scheme for LBIST, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Enhanced debug scheme for LBIST will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3454875