4. Static information storage and retrieval
  5. Addressing
  6. Including particular address buffer or latch circuit...

James Conary

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Input buffer circuit with dual power down functions

Electrical computers and digital processing systems: support – Computer power control
Reexamination Certificate

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Synchronous interface to a self-timed memory array

Static information storage and retrieval – Addressing – Including particular address buffer or latch circuit...
Patent

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Zero standby current power-up reset circuit

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Synchronizing
Patent

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Profile ID: LFUS-PAI-P-1215036

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