Input buffer circuit with dual power down functions

Details Input buffer circuit with dual power down functions Input buffer circuit with dual power down functions

1997-12-31

2001-12-11

Sheikh, Ayaz (Department: 2155)

Electrical computers and digital processing systems: support

Computer power control

C713S322000, C713S323000, C713S500000, C326S081000, C326S103000, C365S226000, C365S185180

Reexamination Certificate

active

06330679

ABSTRACT:

FIELD OF THE INVENTION
The present invention is directed to an input buffer circuit. More particularly, the present invention is directed to an input buffer circuit with dual power down functions.
BACKGROUND OF THE INVENTION
Computer systems include many different types of devices such as processors, memory, memory controllers, etc. Computer system devices typically include an input buffer circuit that includes a plurality of input buffers. An input buffer is a gate that receives an input signal and isolates the input signal from a load.
In some computer systems, different devices require different operating voltages. For example, in computer systems that include the Pentium® Pro processor from Intel Corp., the processor operates at approximately 2.0 volts and peripheral devices such as memory controllers operate at approximately 3.3 volts. In these computer systems, a device that receives inputs from a device that is operating at a different voltage level must buffer the inputs with translating input buffers. A translating input buffer translates the voltage level of an input to the voltage level of the receiving device.
One known type of translating input buffer is a differential amplifier input buffer. Differential amplifier input buffers are desirable as translating input buffers because they can operate at high speeds. However, one problem with known differential amplifier input buffers is that they consume a large amount of direct current (“DC”) power. This problem can substantially reduce the length of time portable computer systems that include these types of input buffers can operate with a single battery.
Based on the foregoing, there is a need for an input buffer circuit that reduces the amount of power consumed by the input buffers.
SUMMARY OF THE INVENTION
One embodiment of the present invention is an input buffer circuit that includes an input buffer. The input buffer has an input adapted to be coupled to a bus and a power down input. The input buffer circuit further includes power down circuitry adapted to be coupled to a bus strobe and coupled to the power down input.


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