Zero standby current power-up reset circuit

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Synchronizing

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Details

327198, H03K 1722

Patent

active

055700500

ABSTRACT:
A circuit and method in a computer system for generating a power-up reset pulse is disclosed. A specially designed flip-flop and a voltage shifter create a signal that ramps-up with a rising voltage from a newly activated power supply until a desired voltage level is reached. The signal is then deasserted and, in one embodiment, the circuit is reset so that another reset signal can be generated should power be removed and then reapplied in a short period of time. This circuit is configured so that no DC current paths from power to ground exist within the circuit once the reset pulse generation is complete.

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patent: 5155730 (1992-10-01), Maida
patent: 5172012 (1992-12-01), Ueda
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patent: 5245330 (1993-09-01), Wassink
patent: 5374923 (1994-12-01), Sakamoto

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