4. Static information storage and retrieval
  5. Floating gate
  6. Particular biasing

James C. Yu

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CMOS Input and output protection circuit

Patent

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Memories with burst mode access

Boots – shoes – and leggings
Patent

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Method of achieving narrow V.sub.T distribution after erase in f

Static information storage and retrieval – Floating gate – Particular biasing
Patent

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Method of erasing a flash EEPROM memory

Static information storage and retrieval – Floating gate – Particular biasing
Patent

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Output noise control scheme for multiple I/O's

Pulse or digital communications – Cable systems and components
Reexamination Certificate

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Profile ID: LFUS-PAI-P-1296753

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