Patent
1981-04-01
1984-10-09
Larkins, William D.
357 13, 357 42, 357 43, 357 44, H01L 2704
Patent
active
044764766
ABSTRACT:
A CMOS gate protection diode clamping the input terminal to substrate potential is prevented from injecting carriers into the substrate and causing SCR latchup by forming the diode as a well to substrate junction, surrounded by another, reverse-biased, well, to both reduce injection and collect parasitic injected carriers before they can diffuse to cause latchup.
REFERENCES:
patent: 3934159 (1976-01-01), Nomiya et al.
patent: 3967295 (1976-06-01), Stewart
patent: 4143391 (1979-03-01), Suzuki
Patel Suman H.
Yu James C.
Larkins William D.
National Semiconductor Corporation
Pollock Michael J.
Winters Paul J.
Woodward Gail W.
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