4. Error detection/correction and fault detection/recovery
  5. Pulse or data error handling
  6. Digital logic testing

Indradeep Ghosh

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Automatic test pattern generation for functional register...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Estimating the difficulty level of a formal verification...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
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Evaluating a validation vector for validating a network design

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
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Event-driven observability enhanced coverage analysis

Data processing: software development – installation – and managem – Software program development tool – Testing or debugging
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Generating a test environment for validating a network design

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
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Profile ID: LFUS-PAI-P-2559919

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