Gregory L. Timp

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Electron tuned quantum well device

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Method of fabricating a composite gate dielectric layer

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Scanning depletion microscopy for carrier profiling

Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – Of individual circuit component or element
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Silicon oxide based gate dielectric layer

Semiconductor device manufacturing: process – Coating of substrate containing semiconductor region or of... – Insulative material deposited upon semiconductive substrate
Reexamination Certificate

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Silicon oxide based gate dielectric layer

Stock material or miscellaneous articles – Composite – Of silicon containing
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Profile ID: LFUS-PAI-P-209863

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