4. Electrical computers and digital processing systems: memory
  5. Storage accessing and control
  6. Specific memory composition

Eugene O'Neill

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Calculation and transmission of error check codes

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Credit-based scheme for high performance communication...

Multiplex communications – Pathfinding or routing – Switching a message which includes an address header
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Direct data placement and message reassembly

Electrical computers and digital data processing systems: input/ – Input/output data processing – Input/output data buffering
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Framing codes for high-speed parallel data buses

Electrical computers and digital data processing systems: input/ – Intrasystem connection
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High speed parallel bit error rate tester

Error detection/correction and fault detection/recovery – Pulse or data error handling – Error count or rate
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Profile ID: LFUS-PAI-P-2013927

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