Debashis Bhattacharya

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Context-sensitive constraint driven uniquification and...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate

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Counterflow pipeline processor architecture for semi-custom appl

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Hierarchical test access port architecture for electronic...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate

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Logic circuit having a functionally redundant transistor...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate

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Method for automated design of integrated circuits with...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate

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Profile ID: LFUS-PAI-P-386954

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