Logic circuit having a functionally redundant transistor...

Details Logic circuit having a functionally redundant transistor... Logic circuit having a functionally redundant transistor...

2005-08-30

2005-08-30

Thompson, A. M. (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000, C716S030000, C716S030000, C708S232000

Reexamination Certificate

active

06938223

ABSTRACT:
A method and system for constructing, designing, and using a family of logic circuits based on methods of interconnecting transistors (or more generally, switches). The method includes the selective use of functionally redundant transistors to achieve target objectives, such as speed of operation, power dissipation, control over switching capacitances, noise characteristics and signal integrity. In accordance with the present invention, multiple topologies may be incorporated into the implementation of a single dynamic transistor topology. The logic circuit family provides flexibility by implementing different topologies for the various functionally redundant sub-networks of transistors. The method is applicable to any network of transistors whose characteristics depend, at least in part, on its implementation topology.

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C. Nielsen, Evaluation of Function Books for Asynchronous Design, Proceedings of the Conference on European Design Automation, pp. 454-459, Sep. 1994.
Kazuo Taki, “A Survey for Pass-Transistor Logic Technologies”, IEEE, 1998.
Mineo Kaneko and Jianlin Tian, “Concurrent Cell Generation and Mapping for CMOS Logic Circuits”, IEEE, 1997.

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