Daniel Kim

Examiner

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Apparatus and method for selecting instructions for...

Electrical computers and digital processing systems: memory – Addressing combined with specific memory configuration or... – For multiple memory modules
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Arrangements storing different versions of a set of data in...

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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Arrangements storing different versions of a set of data in...

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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Cache line ownership transfer in multi-processor computer...

Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
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Cache memory subsystem including a fixed latency R/W pipeline

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Profile ID: LFUS-PAI-P-269421

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