Brian A. Childers

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Bridge for interconnecting a computer system bus, an expansion b

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Bus bridge address translator

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Controller for providing access to a video frame buffer in split

Computer graphics processing and selective visual display system – Display driving control circuitry – Controlling the condition of display elements
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Direct memory access channel architecture and method for recepti

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DMA controller having a plurality of DMA channels each having mu

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Profile ID: LFUS-PAI-P-624344

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