DMA controller having a plurality of DMA channels each having mu

Details DMA controller having a plurality of DMA channels each having mu DMA controller having a plurality of DMA channels each having mu

1994-01-28

1997-08-05

Lee, Thomas C.

395821, 395848, 395853, G06F 1300

Patent

active

056551517

ABSTRACT:
A direct memory access (DMA) controller is connected with the CPU bus of a computer system through a bus interface and also to an I/O bus, which is connectable to one or more I/O controllers. The DMA controller contains multiple channels, each corresponding to a particular I/O controller, which are coupled to both the bus interface and the I/O bus. Each of the channels contains at least one register set storing information for the transfer and a data buffer holding the data during a transfer between the I/O bus and the CPU bus.

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