4. Static information storage and retrieval
  5. Addressing
  6. Sync/clocking

Beng Chew Khou

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Bottom-up approach for synthesis of register transfer level...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate

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Clocking to support interface of memory controller to external S

Static information storage and retrieval – Addressing – Sync/clocking
Patent

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Low power register memory element circuits

Static information storage and retrieval – Systems using particular element – Flip-flop
Patent

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Method and apparatus for exercising external memory with a...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Method and apparatus for exercising external memory with a...

Data processing: measuring – calibrating – or testing – Testing system – Of circuit
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Profile ID: LFUS-PAI-P-474621

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