Barry Joe Wolford

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Configurable DDR write-channel phase advance and delay...

Static information storage and retrieval – Addressing – Sync/clocking
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Device directed memory barriers

Electrical computers and digital data processing systems: input/ – Input/output data processing – Direct memory accessing
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Dynamic cache coherency snooper presence with variable snoop...

Electrical computers and digital data processing systems: input/ – Input/output data processing – Direct memory accessing
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Ensuring orderly forward progress in granting snoop castout...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Generation of a synthetic clock signal in synchronism with a hig

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Profile ID: LFUS-PAI-P-525114

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