4. Error detection/correction and fault detection/recovery
  5. Pulse or data error handling
  6. Digital logic testing

Angela Krstic

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Identification and test generation for primitive faults

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Patent

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Method and system for generating design constraints

Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Testing or evaluating
Reexamination Certificate

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System and method for testing high speed VLSI devices using...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate

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Profile ID: LFUS-PAI-P-1956714

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