4. Error detection/correction and fault detection/recovery
  5. Data processing system error or fault handling
  6. Reliability and availability

Amit D. Sanghani

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Apparatus for scan test of SRAM for microprocessors having full

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Patent

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Apparatus for scan test of SRAM for microprocessors having full

Excavating
Patent

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Automatic test pattern generation modeling for LSSD to...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate

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LSSD interface

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate

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Method and apparatus for scan test of SRAM for microprocessor wi

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
Patent

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Profile ID: LFUS-PAI-P-596126

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