4. Computer-aided design and analysis of circuits and semiconductor
  5. Integrated circuit design processing
  6. Logic design processing

Adam P. Matheny

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Method for reducing wiring congestion in a VLSI chip design

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum
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Method, system, and computer program product for coupled...

Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Logic design processing
Reexamination Certificate

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Reducing coupling between wires of an electronic circuit

Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Physical design processing
Reexamination Certificate

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Structure for an integrated circuit design for reducing...

Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Physical design processing
Reexamination Certificate

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System and method for sign-off timing closure of a VLSI chip

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate

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Profile ID: LFUS-PAI-P-2234566

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