Programmable non-volatile memory cell and method of forming a no

Details Programmable non-volatile memory cell and method of forming a no Programmable non-volatile memory cell and method of forming a no

1997-09-19

1998-05-12

Crane, Sara W.

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257321, H01L 29788

Patent

active

057510393

ABSTRACT:
A method of forming a non-volatile memory array includes, a) providing first and second floating gate word lines atop a semiconductor substrate, the first and second word lines being adjacent one another and defining transistor active area therebetween, the first and second word lines having inwardly opposing and facing active area sidewall edges, the first and second word lines each comprising respective nitride capping layers having a thickness of at least about 1000 Angstroms; b) providing a nitride spacer layer over the nitride capping layer; c) anisotropically etching the nitride spacer layer to produce insulating sidewall spacers over the first and second word line active area sidewall edges, the anisotropic etching leaving at least a portion of the nitride capping layer covering each of the first and second word lines, the portion of each nitride capping layer joining with one of the sidewall spacers to cover the first and second word line active area sidewall edges and thereby defining a widened mask misalignment area than were such capping layer portions not present; d) providing an oxide layer over the sidewall spacers and capping layer; e) patterning and etching the oxide layer selectively relative to the nitride capping layer and sidewall spacers to define a contact opening to the active area, the contact opening overlapping with at least one nitride capping layer portion on one of the word lines; and f) providing an electrically conductive plug within the contact opening. A non-volatile memory array is disclosed.

REFERENCES:
patent: 4982250 (1991-01-01), Manos, II et al.
patent: 5229326 (1993-07-01), Dennison et al.
patent: 5233210 (1993-08-01), Kodama
patent: 5270240 (1993-12-01), Lee
patent: 5282160 (1994-01-01), Yamagata
patent: 5297082 (1994-03-01), Lee
patent: 5338952 (1994-08-01), Yamauchi
patent: 5402374 (1995-03-01), Tsuruta et al.
patent: 5427966 (1995-06-01), Komori et al.
patent: 5484741 (1996-01-01), Bergemont
patent: 5604367 (1997-02-01), Yang

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