Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1997-11-13
2000-12-05
Pham, Long
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438234, 438344, 438345, 438349, 438350, 438367, 438368, 438370, 438375, 438482, 438491, 438545, 438548, 438564, H01L 218238
Patent
active
061565946
ABSTRACT:
The present invention relates to a method for fabricating an integrated circuit including MOS transistors and a bipolar transistor of NPN type, including the steps of: forming the MOS transistors, covering the entire structure with a protection layer, opening the protection layer at the base-emitter location of the bipolar transistor, forming a first P-type doped layer of polysilicon, a second layer of silicon nitride and a second oxide layer, opening these last three layers at the center of the emitter-base region of the bipolar transistor, and depositing a third silicon nitride layer, forming spacers, removing the apparent parts of the third layer of silicon nitride, and depositing a third N-type doped polysilicon layer.
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Galanthay Theodore E.
Morris James H.
Pham Long
SGS-Thomson Microelectronics S.A.
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