Method to improve the topography of a field oxide region

Details Method to improve the topography of a field oxide region Method to improve the topography of a field oxide region

1996-09-25

1998-03-17

Tsai, Jey

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438294, 438439, H01L 218238

Patent

active

057286140

ABSTRACT:
A process for reducing the severe topography in field oxide regions, via use of insulator spacers, on the sides of the field oxide region, has been developed. An insulator layer is first deposited on a field oxide region, and on the active device region, between the isolating field oxide regions. An anisotropic RIE procedure is next employed to create insulator spacers, on the sides of the field oxide regions. The insulator spacers reduce the severity of the field oxide regions, reducing the risk of polysilicon residuals and unwanted sidewalls, during the patterning process used to create the polysilicon gate structure.

REFERENCES:
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patent: 4374698 (1983-02-01), Sanders et al.
patent: 5374585 (1994-12-01), Smith et al.
patent: 5376230 (1994-12-01), Ito
patent: 5399520 (1995-03-01), Jang
patent: 5403770 (1995-04-01), Jang
patent: 5472905 (1995-12-01), Paek et al.

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