Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1998-01-20
1999-12-14
Brown, Peter Toby
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438234, 148DIG9, H01L 218238
Patent
active
060016760
ABSTRACT:
Formed on a p-type semiconductor substrate are bipolar transistors and CMOS transistors. A bipolar transistor has a base extraction electrode a side-surface of which is covered with an oxide layer, a silicon nitride layer, and a polysilicon layer. A CMOS transistor has a gate electrode a side-surface of which is covered with an oxide layer, a silicon nitride layer, and a side-wall layer. The silicon nitride layer on the side-surface of the base extraction electrode is formed by the same fabrication step that the silicon nitride layer on the side-surface of the gate electrode is formed.
REFERENCES:
patent: 5098638 (1992-03-01), Sawada
Shigeki Sawada et al., "Base-Emitter Voltage Mismatch in a pair of Self-Aligned Bipolar Transistors", Proc. of IEEE 1990 Bipolar Circuits and Technology Meeting 8.3, Sep. 17-18, 1990, pp. 184-187.
Furuta Takashi
Sawada Shigeki
Brown Peter Toby
Matsushita Electronics Corporation
Pham Long
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