Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1997-04-15
1999-08-03
Chang, Joni
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438276, 438277, 438278, H01L 2170
Patent
active
059337354
ABSTRACT:
A ROM (read-only memory) device of the type including an array of MOSFET (metal-oxide semiconductor field-effect transistor) memory cells and a method for fabricating the same are provided. The method allows for better planarization of the wafer surface of the ROM device with increased gap fill capability. Further, the bit lines are formed by forming a substantially grid-like structure including a plurality of substantially parallel-spaced first portions oriented in a first direction and a plurality of substantially parallel-spaced second portions oriented in a second direction. The first portions serve as bit lines and the second portions serve as channels. In the code definition and implantation process, a selected number of the channel regions are diffused with impurities so as to set the associated memory cells with a first threshold voltage representing the storage of a first binary digit; while the threshold voltage of all the other channel regions that are not diffused with impurities are set to a second threshold voltage representing the storage of a second binary digit. In the method of fabricating the ROM device, the bit lines are not formed by diffusing impurities into the silicon substrate. As a result of this, the drawbacks of lateral diffusion, junction leakage, and reduced breakdown voltage are not experienced when the ROM device is further miniaturized.
REFERENCES:
patent: 5330924 (1994-07-01), Huang et al.
patent: 5446299 (1995-08-01), Acovic et al.
patent: 5523251 (1996-06-01), Hong
patent: 5539234 (1996-07-01), Hong
Chang Joni
United Microelectronics Corp.
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